1.
Kim
D H, Athikulwongse K, Lim S K. Study of through-silicon-via impact on the 3-D
stacked IC layout. IEEE Trans on Very Large Scale Integration (VLSI) Systems,
2013, 21(5): 862-874
2.
Luo
M Y, Cui X L, Lin Q J, et al. An exhaustive search of the 6C level crosstalk
avoidance codes for TSV array. Proceedings of the 2017 International Conference on
Electron Devices and Solid-State Circuits (EDSSC’17), Oct 18-20, 2017, Hsinchu, China. Piscataway,
NJ, USA: IEEE, 2017: 1-2
3.
Cui
X L, Luo M Y, Lin Q J, et al. An exhaustive search of the optimal 6C level
static shielding scheme for rectangle TSV arrays. Proceedings of the 19th International Conference on
Electronic Packaging Technology (ICEPT’18), Aug 8-11, 2018, Shanghai, China. Piscataway,
NJ, USA: IEEE, 2018: 944-948
4.
Duan
C, Zhu C Y, Khatri S P. Forbidden transition free crosstalk avoidance CODEC
design. Proceedings of the 45th ACM/IEEE
Design Automation Conference,
Jun 8-13,
2008, Anaheim, CA, USA. New York, NY, USA: ACM, 2008: 986-991
5.
Duan
C, Calle V H C, Khatri S P. Efficient on-chip crosstalk avoidance CODEC design.
IEEE Trans on Very Large Scale Integration (VLSI) Systems, 2009, 17(4): 551-560
6.
Duan
C, Lameres B J, Khatri S P. On and off-chip crosstalk avoidance in VLSI design.
Boston, MA, USA: Springer , 2010
7.
Marinissen
E J. Testing TSV-based three-dimensional stacked ICs. Proceedings of the 2010 Design, Automation and Test in
Europe Conference and Exhibition (DATE’10), Mar 8-12, 2010, Dresden, Germany. Piscataway, NJ,
USA: IEEE, 2010: 1689-1694
8.
Maity
D, Roy S, Giri C, et al. Identification of faulty TSV with a built-in self-test
mechanism. Proceedings
of the IEEE 27th Asian Test Symposium
(ATS’18), Oct 15-18, 2018, Hefei, China. Piscataway,
NJ, USA: IEEE, 2018: 1-6
9.
Kang
U, Chung H J, Heo S, et al. 8 Gb 3-D DDR3 DRAM using through-silicon-via
technology. IEEE Journal of Solid-State Circuits, 2010, 45(1): 111-119
10. Hsieh A C, Hwang T. TSV redundancy:
architecture and design issues in 3-D IC. IEEE Trans on Very Large Scale
Integration (VLSI) Systems, 2012, 20(4): 711-722
11. Yuan Q, Zhao Z Y, Dou Q, et al.
Design and implementation of TSV chain redundancy repair circuit in 3D chip.
Computer Engineering and Science, 2014 36(5): 828-835 (in Chinese)
12. Jiang L, Xu Q, Eklow B. On effective
TSV repair for 3D-stacked ICs. Proceedings of the 2012 Design, Automation and Test in
Europe Conference and Exhibition (DATE’12), Mar 12-16, 2012, Dresden,
Germany. Piscataway, NJ, USA: IEEE, 2012: 793-798
13. Jiang L, Ye F M, Xu Q, et al. On
effective and efficient in-field TSV repair for stacked 3D ICs. Proceedings
of the 50th ACM/EDAC/IEEE Design Automation
Conference (DAC’13), May 29-Jun 7, 2013, Austin,
TX, USA. New York, NY, USA: ACM, 2013: Article 74
14. Zhang S J, Cui X L, Zhang Q, et al.
A TSV repair method for clustered faults. Proceedings of the IEEE 11th
International Conference on ASIC (ASICON’15), Nov 3-6, 2015, Chengdu, China.
Piscataway,
NJ, USA: IEEE, 2015: 1-4
15. Kuang Y M, Zhao K, Miao M, et al.
Dynamic dual-self-repair method of TSV array in 3D-IC. Semiconductor Technology,
2019, 44(2): 121-128 (in Chinese)
16. Kumar R, Khatri S P. Crosstalk
avoidance codes for 3D VLSI. Proceedings of the 2013 Design, Automation and Test in
Europe Conference and Exhibition (DATE’13), Mar 18-22, 2013, Grenoble, France. Piscataway,
NJ, USA: IEEE, 2013: 1673-1678
17. Cui X L, Cui X X, Ni Y W, et al. An
enhancement of crosstalk avoidance code based on Fibonacci numeral system for
through silicon vias. IEEE Trans on Very Large Scale Integration (VLSI)
Systems, 2017, 25(5): 1601-1610
18. Chang Y Y, Chieh Huang Y S,
Narayanan V, et al. ShieldUS: a novel design of dynamic shielding for
eliminating 3D TSV crosstalk coupling noise. Proceedings of the 18th Asia and South Pacific Design
Automation Conference (ASP-DAC’13), Jan 22-25, 2013, Yokohama, Japan. Piscataway,
NJ, USA: IEEE, 2013: 675-680
19. Serafy C, Srivastava A. TSV
replacement and shield insertion for TSV-TSV coupling reduction in 3-D global
placement. IEEE Trans on Computer-Aided Design of Integrated Circuits and
Systems, 2015, 34(4): 554-562
20. Stapper C H. On a composite model to
the IC yield problem. IEEE Journal of Solid-State Circuits, 1975, 10(6):
537-539
21. Lo W H, Chi K, Hwang T T.
Architecture of ring-based redundant TSV for clustered faults. Proceedings of
the 2015 Design, Automation and Test in Europe Conference and Exhibition
(DATE’15), Mar 9-13, 2015, Grenoble, France. Piscataway, NJ, USA: IEEE, 2015:
848-853
22. Ran Y L, Cui X L, Xu X Y, et al. A
crosstalk avoidance method combining crosstalk avoidance code with shielding
wire technique. Proceedings of the 2016 IEEE MTT-S International Microwave
Workshop Series on Advanced Materials and Processes for RF and THz Applications
(IMWS-AMP’16), Jul 20-22,
2016, Chengdu, China. Piscataway,
NJ, USA: IEEE, 2016: 1-3
|