中国邮电高校学报(英文) ›› 2014, Vol. 21 ›› Issue (4): 77-82.doi: 10.1016/S1005-8885(14)60319-8

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Improvement for low power high performance hybrid type CAM

卢文娟1,彭春雨1,蔺智挺2,吴秀龙3,陈军宁1   

  1. School of Electronics and Information Engineering, Anhui University, Hefei 230601, China
  • 收稿日期:2013-08-20 修回日期:2014-05-21 出版日期:2014-08-31 发布日期:2014-08-30
  • 通讯作者: 蔺智挺 E-mail:ztlin@ahu.edu.cn
  • 基金资助:

    国家科技重大专项课题;安徽省高校自然科学基金

Improvement for low power high performance hybrid type CAM

  1. School of Electronics and Information Engineering, Anhui University, Hefei 230601, China
  • Received:2013-08-20 Revised:2014-05-21 Online:2014-08-31 Published:2014-08-30
  • Supported by:

    the National Science and Technology major Project;the Natural Science Fund for Colleges and Universities in Anhui Province

摘要: Based on the analysis of typical hybrid-type content addressable memory (CAM) structures, a hybrid-type CAM architecture with lower power consumption and higher stability was proposed. This design changes the connection of a N-type metal-oxide-semiconductor (NMOS) transistor in the control circuit, which greatly reduces the power consumption during comparison by making the match line simply discharge to the NMOS threshold voltage. A comparative study was made between conventional and the proposed hybrid-type CAM architecture by semiconductor manufacturing international corporation (SMIC) 65 nm complementary metal-oxide-semiconductor (CMOS) technology. Simulation shows that the power consumption of the proposed structure is reduced by 23%. Furthermore, the proposed design also adjusts the match line (ML) discharge path. In case that, the not and type (NAND-type) block is matched and the not or type (NOR-type) block is mismatched, the jitter voltage on the match line can be decreased largely.

关键词: CAM, NAND-type, NOR-type, hybrid-type CAM design, low power

Abstract: Based on the analysis of typical hybrid-type content addressable memory (CAM) structures, a hybrid-type CAM architecture with lower power consumption and higher stability was proposed. This design changes the connection of a N-type metal-oxide-semiconductor (NMOS) transistor in the control circuit, which greatly reduces the power consumption during comparison by making the match line simply discharge to the NMOS threshold voltage. A comparative study was made between conventional and the proposed hybrid-type CAM architecture by semiconductor manufacturing international corporation (SMIC) 65 nm complementary metal-oxide-semiconductor (CMOS) technology. Simulation shows that the power consumption of the proposed structure is reduced by 23%. Furthermore, the proposed design also adjusts the match line (ML) discharge path. In case that, the not and type (NAND-type) block is matched and the not or type (NOR-type) block is mismatched, the jitter voltage on the match line can be decreased largely.

Key words: CAM, NAND-type, NOR-type, hybrid-type CAM design, low power

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