Acta Metallurgica Sinica(English letters) ›› 2008, Vol. 15 ›› Issue (4): 107-111.doi:

• UWB Wireless Communications and CMOS RF IC Design • 上一篇    下一篇

Design of a fully differential CMOS LNA for 3.1–10.6 GHz UWB communication systems

张鸿,陈贵灿   

  1. Institute of Microelectronics, Xi’an Jiaotong University, Xi’an 710049, China
  • 收稿日期:2008-05-15 修回日期:1900-01-01 出版日期:2008-12-30
  • 通讯作者: 张鸿

Design of a fully differential CMOS LNA for 3.1–10.6 GHz UWB communication systems

ZHANG Hong, CHEN Gui-can   

  1. Institute of Microelectronics, Xi’an Jiaotong University, Xi’an 710049, China
  • Received:2008-05-15 Revised:1900-01-01 Online:2008-12-30
  • Contact: ZHANG Hong

摘要:

A fully differential complementary metal oxide semiconductor (CMOS) low noise amplifier (LNA) for 3.1–10.6 GHz ultra-wideband (UWB) communication systems is presented. The LNA adopts capacitive cross-coupling common-gate (CG) topology to achieve wideband input matching and low noise figure (NF). Inductive series-peaking is used for the LNA to obtain broadband flat gain in the whole 3.1–10.6 GHz band. Designed in 0.18 m CMOS technology, the LNA achieves an NF of 3.1–4.7 dB, an S11 of less than –10 dB, an S21 of 10.3 dB with 0.4 dB fluctuation, and an input 3rd interception point (IIP3) of –5.1 dBm, while the current consumption is only 4.8 mA from a 1.8 V power supply. The chip area of the LNA is 10.94 mm2.

关键词:

LNA,;common;gate,;capacitive;cross;coupling,;series;peaking,;UWB

Abstract:

A fully differential complementary metal oxide semiconductor (CMOS) low noise amplifier (LNA) for 3.1–10.6 GHz ultra-wideband (UWB) communication systems is presented. The LNA adopts capacitive cross-coupling common-gate (CG) topology to achieve wideband input matching and low noise figure (NF). Inductive series-peaking is used for the LNA to obtain broadband flat gain in the whole 3.1–10.6 GHz band. Designed in 0.18 m CMOS technology, the LNA achieves an NF of 3.1–4.7 dB, an S11 of less than –10 dB, an S21 of 10.3 dB with 0.4 dB fluctuation, and an input 3rd interception point (IIP3) of –5.1 dBm, while the current consumption is only 4.8 mA from a 1.8 V power supply. The chip area of the LNA is 10.94 mm2.

Key words:

LNA;common gate;capacitive cross coupling;series peaking;UWB