| 1. Hennessy J L, Patterson D A. Computer architecture: a quantitative approach. 3rd ed. San Francisco, CA, USA: Kaufman, 2002
2. Segars S. Low power design techniques for microprocessors. Proceedings of IEEE International Solid-State Circuits Conference, Feb 5-6, 2001, San Francisco, CA, USA. 2001: 4-10
3. Albonesi D H. Selective cache ways: on-demand cache resource allocation. Proceedings of the 32nd Annual ACM/IEEE International Symposium on Microarchitecture (MICRO-32), Nov 16-18, 1999, Haifa, Israel. 1999: 248-259
4. Yang C L, Lee C H. Hotspot cache: joint temporal and spatial locality exploitation for I-cache energy reduction. Proceedings of the 2004 International Symposium on Low Power Electronics and Design (ISLPED’04), Aug 9-11, 2004, Newport Beach, CA, USA. 2004: 114-119
5. Balasubramonian R, Albonesi D H, Buyuktosunoglu A, et al. A dynamically tunable memory hierarchy. IEEE Transactions on Computers, 2003, 52(10): 1243-1258
6. Zhang C J, Vahid F, Yang J, et al. A way-halting cache for low-energy high-performance systems. Proceedings of the 2004 International Symposium on Low Power Electronics and Design (ISLPED’04), Aug 9-11, 2004, Newport Beach, CA, USA. 2004: 126-131
7. Yang S H, Powell M D, Falsafi B, et al. Exploiting choice in resizable cache design to optimize deep-submicron processor energy-delay. Proceedings of Eighth International Symposium on High-Performance Computer Architecture (HPCA’02), Feb 2-6, 2002, Cambridge, MA, USA. 2002: 151-161
8. Gordon-Ross A, Viana P, Vahid F, et al. A one-shot configurable-cache tuner for improved energy and performance. Proceedings of 2007 Design, Automation and Test in Europe Conference and Exhibition (DATE’07), Apr 16-20, 2007, Nice Acropolis, France. 2007: 755-760
9. Mattson R L, Gecsei J, Slutz D R, et al. Evaluation techniques for storage hierarchies. IBM Systems Journal, 1970, 9(2): 78-117
10. Kessler R E, Jooss R, Lebeck A, et al. Inexpensive implementations of set-associativity. 16th Annual International Symposium on Computer Architecture (ISCA’89), May 28-Jun 1, 1989, Jerusalem, Israel. 1989: 131-139
11. Shiue W T, Udayanarayanan S, Chakrabarti C. Data memory design and exploration for low-power embedded systems. ACM Transactions on Design Automation of Electronic Systems, 2001, 6(4): 553-568 |
