Design and verification of on-chip debug circuit based on JTAG

doi:10.19682/j.cnki.1005-8885.2021.0019

中国邮电高校学报(英文) ›› 2021, Vol. 28 ›› Issue (3): 95-101.doi: 10.19682/j.cnki.1005-8885.2021.0019

Design and verification of on-chip debug circuit based on JTAG

白创¹,吕豪¹,张伟², Li Fan¹

1. 长沙理工大学
2. Hunan Provincial Key Laboratory of Flexible Electronic Materials Genome Engineering, Changsha 410114, China

收稿日期:2020-09-16 修回日期:2020-12-23 出版日期:2021-06-30 发布日期:2021-06-22
通讯作者: 吕豪 E-mail:303791411@qq.com
基金资助:
湖南省教育厅科学研究项目

Design and verification of on-chip debug circuit based on JTAG

1. School of Physics and Electronic Science, Changsha University of Science & Technology, Changsha 410114, China 2. Hunan Provincial Key Laboratory of Flexible Electronic Materials Genome Engineering, Changsha 410114, China

Received:2020-09-16 Revised:2020-12-23 Online:2021-06-30 Published:2021-06-22
Supported by:
Scientific Research Project of Hunan Provincial Department of Education

摘要/Abstract

摘要：

An on-chip debug circuit based on Joint Test Action Group (JTAG) interface for L-digital signal processor (L- DSP) is proposed, which has debug functions such as storage resource access, central processing unit (CPU) pipeline control, hardware breakpoint/ observation point, and parameter statistics. Compared with traditional debug mode, the proposed debug circuit completes direct transmission of data between peripherals and memory by adding data test-direct memory access (DT-DMA) module, which improves debug efficiency greatly. The proposed circuit was designed in a 0-18 μm complementary metal-oxide-semiconductor ( CMOS) process with an area of 167 234.76 μm² and a power consumption of 8.89 mW. And the proposed debug circuit and L-DSP were verified under a field programmable gate array (FPGA). Experimental results show that the proposed circuit has complete

debug functions and the rate of DT-DMA for transferring debug data is three times faster than the CPU.

关键词:

on-chip debug, data test-direct memory access (DT-DMA), joint test action group (JTAG) interface, L-digital signal processor (L-DSP)

Abstract:

Aiming at the shortcomings of current gesture tracking methods in accuracy and speed, based on deep learning You Only Look Once version 4 (YOLOv4) model, a new YOLOv4 model combined with Kalman filter rea-time hand tracking method was proposed. The new algorithm can address some problems existing in hand tracking technology such as detection speed, accuracy and stability. The convolutional neural network (CNN) model YOLOv4 is used to detect the target of current frame tracking and Kalman filter is applied to predict the next position and bounding box size of the target according to its current position. The detected target is tracked by comparing the estimated result with the detected target in the next frame and, finally, the real-time hand movement track is displayed. The experimental results validate the proposed algorithm with the overall success rate of 99.43%

at speed of 41.822 frame/ s, achieving superior results than other algorithms.

Key words:

on-chip debug, data test-direct memory access (DT-DMA), joint test action group (JTAG) interface, L-digital signal processor (L-DSP)

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Design and verification of on-chip debug circuit based on JTAG

Design and verification of on-chip debug circuit based on JTAG

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