Acta Metallurgica Sinica(English letters) ›› 2013, Vol. 20 ›› Issue (5): 30-36.doi: 10.1016/S1005-8885(13)60086-2

• Networks • 上一篇    下一篇

Mesh-connected rings topology for network-on-chip

刘有耀,高萌   

  1. School of Electronic Engineering, Xi’an University of Posts & Telecommunications, Xi’an 710121, China
  • 收稿日期:2013-04-18 修回日期:2013-08-16 出版日期:2013-10-30 发布日期:2013-10-29
  • 通讯作者: 刘有耀 E-mail:lyyao2002@163.com
  • 基金资助:
    This work was supported by the National Science Foundation of China (61136002, 61272120), the Key Project of Chinese Ministry of Education (211180), the Natural Science Foundation of Shaanxi Province of China (2010JQ8014), and the Scientific Research Program Funded of Shaanxi Provincial Education Department (2010JK826 ).

Mesh-connected rings topology for network-on-chip

  1. School of Electronic Engineering, Xi’an University of Posts & Telecommunications, Xi’an 710121, China
  • Received:2013-04-18 Revised:2013-08-16 Online:2013-10-30 Published:2013-10-29
  • Contact: You-Yao LIU E-mail:lyyao2002@163.com
  • Supported by:
    This work was supported by the National Science Foundation of China (61136002, 61272120), the Key Project of Chinese Ministry of Education (211180), the Natural Science Foundation of Shaanxi Province of China (2010JQ8014), and the Scientific Research Program Funded of Shaanxi Provincial Education Department (2010JK826 ).

摘要: With the feature size of semiconductor technology reducing and intellectual property (IP) cores increasing, on-chip interconnection network architectures have a great influence on the performance and area of system-on-chip (SoC) design. Focusing on trade-off performance, cost and implementation, a regular network-on-chip (NoC) architecture which is mesh-connected rings (MCR) interconnection network is proposed. The topology of MCR is simple, planar and scalable in architecture, which combines mesh with ring. A detailed theoretical analysis for MCR and mesh is given, and a simulation analysis based on the virtual channel router with wormhole switching is also presented. The results compared with the general mesh architecture show that MCR has better performance, especially in local traffics and low loads, and lower cost.

关键词: SOC, NOC, network topology, routing algorithms, performance evaluation

Abstract: With the feature size of semiconductor technology reducing and intellectual property (IP) cores increasing, on-chip interconnection network architectures have a great influence on the performance and area of system-on-chip (SoC) design. Focusing on trade-off performance, cost and implementation, a regular network-on-chip (NoC) architecture which is mesh-connected rings (MCR) interconnection network is proposed. The topology of MCR is simple, planar and scalable in architecture, which combines mesh with ring. A detailed theoretical analysis for MCR and mesh is given, and a simulation analysis based on the virtual channel router with wormhole switching is also presented. The results compared with the general mesh architecture show that MCR has better performance, especially in local traffics and low loads, and lower cost.

Key words: SOC, NOC, network topology, routing algorithms, performance evaluation