Acta Metallurgica Sinica(English letters)

• Integrated Circuit Design • Previous Articles     Next Articles

Design of 2.1 GHz CMOS Low Noise Amplifier

LI En-ling; SONG Lin-hong; YANG Dang-qiang   

  1. Science School, Xi’an University of Technology, Xi’an 710048, China
  • Received:2005-07-04 Revised:1900-01-01 Online:2006-03-30
  • Contact: LI En-ling

Abstract: This paper discusses the design of a fully differential 2.1 GHz CMOS low noise amplifier using the TSMC 0.25 μm CMOS process. Intended for use in 3G, the low noisse amplifier is fully integrated and without off-chip components. The design uses an LC tank to replace a large inductor to achieve a smaller die area, and uses shielded pad capacitances to improve the noise performance. This paper also presents evaluation results of the design. 18 Refs. In English.

Key words: LNA; LC tank; noise figure; shielded pads

CLC Number: