Improvement of CRC receiving controller for serial RapidIO

doi:10.1016/S1005-8885(13)60034-5

中国邮电高校学报(英文)

Improvement of CRC receiving controller for serial RapidIO

吴峰锋,贾嵩,王源,张大成

北京大学

收稿日期:2012-08-21 修回日期:2013-01-18 出版日期:2013-04-30 发布日期:2013-04-26
通讯作者: 吴峰锋 E-mail:wuff@pku.edu.cn
基金资助:
This work was supported by the Special Funds for Major State Basic Research Projects (2010CB934200).

Improvement of CRC receiving controller for serial RapidIO

Received:2012-08-21 Revised:2013-01-18 Online:2013-04-30 Published:2013-04-26
Contact: Feng-Feng Wu E-mail:wuff@pku.edu.cn
Supported by:
This work was supported by the Special Funds for Major State Basic Research Projects (2010CB934200).

摘要/Abstract

摘要：

Serial RapidIO (SRIO) is an emerging high-performance interconnection technology for embedded systems. Protections for SRIO packets are provided by the cyclic redundancy check (CRC). In this paper, an improved CRC receiving controller with 64-bit internal data width is proposed. Equivalent judgment logics are adopted in the aims of reducing the number of CRC generators. The resource consumption and power dissipation can be saved meanwhile the frequency requirement can still be met. By comparison to conventional structures, the proposed scheme can achieve better performances. Therefore, this improved receiving controller is considered applicable in high-performance SRIO interconnections.

关键词:

SRIO, CRC, judgment logic, embedded interconnection

Abstract:

Key words:

SRIO, CRC, judgment logic, embedded interconnection

中图分类号:

参考文献

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Improvement of CRC receiving controller for serial RapidIO

Improvement of CRC receiving controller for serial RapidIO

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