Acta Metallurgica Sinica(English letters) ›› 2015, Vol. 22 ›› Issue (1): 72-76.doi: 10.1016/S1005-8885(15)60627-6

• Others • 上一篇    下一篇

Fast division-free parallel structure for convolution perfectly matched layer in finite difference time domain method

白冰,牛中奇,牛毅,魏兵,赵钢   

  1. 西安电子科技大学
  • 收稿日期:2014-10-26 修回日期:2014-11-24 出版日期:2015-02-28 发布日期:2015-02-28
  • 通讯作者: 白冰 E-mail:baibing_xdu@qq.com
  • 基金资助:

    国家自然科学基金;国家自然科学基金;中央高校基本科研业务费;中央高校基本科研业务费

Fast division-free parallel structure for convolution perfectly matched layer in finite difference time domain method

  • Received:2014-10-26 Revised:2014-11-24 Online:2015-02-28 Published:2015-02-28
  • Supported by:

    National Natural Science Foundation of China;National Natural Science Foundation of China;the Fundamental Research Funds for the Central Universities;the Fundamental Research Funds for the Central Universities

摘要: Parallel acceleration of convolution perfectly matched layer (CPML) algorithm suffers from massive division operation which is widely accepted as one of the most expensive operations for the equipment such as graphic processing unit (GPU), field programmable gate array (FPGA) etc. In pursuit of higher efficiency and lower power consumption, this article revisited the CPML theory and proposed a new fast division-free parallel CPML structure. By optimally rearranging the CPML inner iteration process, all the division operators can be eliminated and replaced by recalculating the related field updating coefficients offline. Experiments show that the proposed division-free structure can save more than 50% arithmetic instructions and 25% execution time of the traditional parallel CPML structure without any accuracy loss.

关键词: division elimination, convolution perfectly matched layer, finit difference time domain, parallel computing, graphic processing unit

Abstract: Parallel acceleration of convolution perfectly matched layer (CPML) algorithm suffers from massive division operation which is widely accepted as one of the most expensive operations for the equipment such as graphic processing unit (GPU), field programmable gate array (FPGA) etc. In pursuit of higher efficiency and lower power consumption, this article revisited the CPML theory and proposed a new fast division-free parallel CPML structure. By optimally rearranging the CPML inner iteration process, all the division operators can be eliminated and replaced by recalculating the related field updating coefficients offline. Experiments show that the proposed division-free structure can save more than 50% arithmetic instructions and 25% execution time of the traditional parallel CPML structure without any accuracy loss.

Key words: division elimination, convolution perfectly matched layer, finit difference time domain, parallel computing, graphic processing unit

中图分类号: