中国邮电高校学报(英文版) ›› 2018, Vol. 25 ›› Issue (1): 78-84.doi: 10.19682/j.cnki.1005-8885.2018.0009

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Design of  a 10 bit high resolution, high speed time-to-digital converter using a two-step pulse-train time amplifier

吴泽波1,陈炳旭2,Fan Chuanqi1,王源1,贾嵩1   

  1. 1. 北京大学
    2.
  • 收稿日期:2017-05-26 修回日期:2018-01-19 出版日期:2018-02-28 发布日期:2018-02-28
  • 通讯作者: 贾嵩 E-mail:jias@pku.edu.cn

Design of a 10 bit high resolution, high speed time-to-digital converter using a two-step pulse-train time amplifier

  • Received:2017-05-26 Revised:2018-01-19 Online:2018-02-28 Published:2018-02-28

摘要: A high resolution and fast conversion rate time-to-digital converter (TDC) design based on time amplifier (TA) is proposed. The pulse-train TA employs a two-step scheme. The input time interval is first amplified by a N-times TA and the effective time is extracted in pulse-train using a time-register. Then the resulted interval is further amplified by the other pulse-train amplifier to obtain the final result. The two-step TA can thus achieve large gain that is critical for high resolution TDC. Simulation results in 1.2 V, 65 nm technology showed that for a 10 bit TDC, a resolution of 0.8 ps and a conversion rate of 150 MS/s are achieved while consuming 2.1 mW power consumption.

关键词: time-to-digital converter , time amplifier , two-step architecture, time register

Abstract: A high resolution and fast conversion rate time-to-digital converter (TDC) design based on time amplifier (TA) is proposed. The pulse-train TA employs a two-step scheme. The input time interval is first amplified by a N-times TA and the effective time is extracted in pulse-train using a time-register. Then the resulted interval is further amplified by the other pulse-train amplifier to obtain the final result. The two-step TA can thus achieve large gain that is critical for high resolution TDC. Simulation results in 1.2 V, 65 nm technology showed that for a 10 bit TDC, a resolution of 0.8 ps and a conversion rate of 150 MS/s are achieved while consuming 2.1 mW power consumption.

Key words: time-to-digital converter , time amplifier , two-step architecture, time register